The present invention relates to isolation of a semiconductor device, and more particularly to an implanted channel stop layer aligned to a polysilicon field plate layer to achieve isolation in a semiconductor device.
Metal routing and ionic contamination from packaging can induce unwanted leakage in metal oxide semiconductor (MOS) circuits. This leakage can manifest itself as current flow between adjacent devices in a circuit, or as current flow internal to a single device. In high voltage analog circuits, high resistivity silicon layers are used to support the high operating voltage. High resistivity silicon is sensitive to induced leakage current from metal routing and ionic contamination. An isolation method and scheme is employed that reduces current leakage without unduly limiting the maximum operating voltage.